Onward...

Well.. After talking with NI tech support for a very LONG time about why I'm not getting any worthwhile data it was identified that I needed new drivers.. I was running RIO 3.0.1 or something, and I needed RIO 3.3.0 drivers..

So I download the drivers, 1.5GB last friday.. Get here today, install drivers.. Takes the computer about 1.5 hours to install them.. Reboot.. Check software on RIO target, it is still 3.0.1. Try to install 3.3.0 on device, but it always times out. So I try and remove the old drivers, and put on new. Times out again.. Try and format the RIO, but says I need to be in safe mode. Find safe mode dip switch, throw it, reboot, then format it... Reset IP information, put that back on. Reboot again. Take off safe mode dip switch, reboot. Still in safe mode cuz it does that automagically because no software on the RIO. Push software to is sucessfully! Reboot! Rejoice... 3.5 hours gone by, and barely anything to show for it.. bleg.

Let's go see what I can do with what I got...

-Kyle

I haven't updated in a while, but to my defense, I lost a big portion of one of my blog updates, and it makes me sad.

So... I've been working on buffered DMA transferred data, and I'm banging my head against the wall. For some reason, I am just not getting any data out of the DMA transfer. I went to a NI seminar up off of Cobb parkway a few weeks back, and the NI rep (Nick Rice) said to shoot him an email with questions, so I did today. Let's see what he has to say..

PICs for clicks!


-Kyle

Eureka!

Well.... I've finally managed to acquire a waveform... Granted, it is only the positive side of the waveform... I would need a splitter from the freq generator, and take the other lead and plug it into AI1 and then take the "lead ground" and put it to positive voltage source so the negative part of the waveform has a potential sink. Not really worth trying to figure that out currently, but it would be child's play if need be. As you can see, I'm losing precision in the sampling, but I ran out of time to figure out if it was from forcing the data to a lower precision, or I had max'd out the precision on the A/D.


Well.. Now I am off to the next part of this project, and that is quite exciting.


Coincidentally, I did goto NITS in huntsville, al this past tuesday. Stands for National Instruments Technical (or training?) Symposium. I learned a lot of very interesting things, but most of the juicy information wasn't "how do I do this" kind of scenario. It was picking up the little nuances of Labview that would trip the newbie up. For example, if you use a while loop in your FPGA code, it will throw your loop timing completely off, as the while loop takes quite a few clock cycles to actually work, where a special timed loop forces it to run on clock speed. The list goes on, but alas, my time has come to a close for today.

Au Revoir Mon/Ma Amie!

-Kyle

Real Time continued

Alright. I've been away for a bit. Was sick, and then had a car show... The break has given me some fresh air to hit it hard when I came back...


I've been working on the real time module to work at getting some samples from the frequency generator I have hooked up to the sbRIO board. It looks promising, but there are soo many layers with funky timing that it seems a little convoluted. Anyways... The real time wizard spits out a project explorer that I then went and dumped in an FPGA vi to acquire some data from the AIO port on the sbRIO board. Then the data input, I linked into the shared variable engine which let me tie that data up to a variable that can be accessed on a higher level VI, which can then be manipulated with the whole control palette instead of the limited FPGA stuff. I'm still a bit floundering in the dark, so I posted my progress on the ni forums to maybe get some insight about what I am doing right/wrong. I'll post my post recent project explorer so you can see kind of how the realtime project flows.

Real Time

I think I am kind of geared in the right direction by doing a real-time measurement. When I go into the real time wizard though, and it completes the wizard, it throws some error about missing some Variable timing engine. I looked it up online, and it says you need to install it through MAX. I went into MAX, and it is already installed. Not quite sure.. I love errors that compound my confusion.

Frustrating

I'm banging my head against the wall a bit, but that's nothing new... Trying to wrap my mind around the whole idea of getting some data up to the host vi, let alone putting it into a more useable format that just an indictaor... The getting started guide wasn't much help when it talks about waveforms, as it sees a continuous stream of data, where I will be waiting for the FIFO buffer to fill up, assert interrupt request, pass data up to host vi, then concatecate the data into an array, and then spit it into some useful waveform, or distribution, or plot, or some psuedo-oscilliscope.

Anyways, that's enough of my ranting.. Until next friday.

-Kyle

What's the frequency Kenneth?

So yeah, the subject is the name of a REM song. It was big when I was a teenager. Anyways..

Dr. He and I had a little chat today. Kinda got me going in a better direction. I broke out the signal generator, and hooked it up to one of the analog inputs. That wasn't the hard part.

I even got the FGPA VI done for it. Working on the Host VI side of it though. Getting the data seems to be pretty easy, but getting it into a workable form is another story. Since it is sampled data, it is a digital signal so to speak. Here is where I'm lacking a bit of knowledge.. Do I dump the digital signal into a 1D array, then generate a waveform? Or is there a way to take the digital data, and drop it straight out to a waveform that I can see? Still working on that.. Until next friday.

-Kyle

Progresso

Soo.... John had a lot of questions today, and we worked on a couple VIs. This capturing sound idea is quite a bit to chew. Just taking in a lot of information, and it is taking me down some complex roads. We'll get there though, or at least have a pretty good understanding of why we can't get there. Pick one.

Have a great weekend.

-Kyle

push it to the limit

So today we did a lot of research and conversations about things we were working on. I will post the updated VI from before for download as an edit to this blog entry later.

fixed the blinkers

With the help of Kyle we figured out that since we were plugged into the digital I/O and the high pins we needed to change the vi somewhat to reflect this. This sort of thinking about problems helps. We must remember that we are not only writing code (or perhaps drawing it in this case), we are also interacting with an electronic circuit board. Picture of the VI is included.

Good information on data acquisition from fpga's

In my research I came across a helpful example showing a host file doing data acquisition. The downloadable file was written in labview 8.6 which is incompatible with 8.5 but the pictures of the block diagram are none-the-less interesting.

http://decibel.ni.com/content/docs/DOC-4048

What I've been doing this week

I am posting what I have been working on this week. Hopefully it makes sense to some people. I have included a link to download all of the files I have been working on.

Sound Acquisition

Hope you enjoy!

learning FPGA's

For anyone learning LabVIEW FPGA I recommend the NI demo that was recommended to Kyle. It offers a good groundwork to work from that helps the user understand what the wizard creates and how each piece works together. I have included the link for future reference.

http://www.ni.com/swf/presentation/us/labview/lvfpga/default.htm

Analog sampling, so it begins

Just reading through some tutorials about analog sampling.. Great buzz words for sampling are sampling rate, Nyquist's thereom, quantization, and dithering.

http://zone.ni.com/wv/app/doc/p/id/wv-291

Also, here is what I have been going through today as well:
http://zone.ni.com/devzone/cda/tut/p/id/3405

Quite a lot to learn.

-Kyle

Moving on to Rock -n- Roll Sampling

Alright.. John and I had a good talk with Dr. He today regarding next steps, and a little proof of concept on LEDs.

Next milestone so to speak.. The ultimate goal is to sample a sound card out of a computer.
That has a lot of facets, of which, I need to explore exactly how to do it. Just a sampler of requisites for sampling sound is: For accurate measurements, the sampling rate of the system should be at least twice the frequency of the signals being acquired. Pulled that off the NI website. (http://zone.ni.com/devzone/cda/tut/p/id/7110#toc1)

Then from there, off to photomultipliers, and sampling them, but that would be getting ahead of ourselves. Anyways... I'm off to do some more research on sampling sound. I'm going to start on the above link, and follow the proverbial rabbit hole.

-Kyle

Kyle University

http://www.ni.com/swf/presentation/us/labview/lvfpga/default.htm

Okay, I am showing john this great presentation, the first part of it is pretty useless, but once you get down to the demos it has some real juicy information. We went through this presentation with lots of stops to show nuances within labview, and the subtle differences that a labview operator is aware of.

Friday......

Boy is it hot outside... Glad to get inside, and cooled down.

Haven't made a lot of show able progress today, but I've been going through a lot of FPGA documentation on the Developer Zone on NI's website. Learning a bit more about DMA FIFO memory access, as well as using interrupts. Basically... You compile an FPGA VI to get a specified amount of data from a channel, let's say.. Collect 5 analog samples of a temperature sensor, when it has 5 samples, the FPGA VI, sends it up to the Host VI. Host VI then says, okay, this temperature is out of spec, let's compare it to the last couple values. Okay, it has been out of spec for 6 cycles, therefore, I want to open the cooling valve by Pi()/64 radians, which sends this procedure to a sub-VI that opens the cooling valve a little bit. Once that Sub-VI is done, it goes back to the Host VI, and says, ok, I'm done. The Host VI says, okay, in order for the system to return to steady state from the transient state I just put it in, I need to wait 40 seconds. So... Wait 40 seconds... Then, go back to FPGA VI, and take more samples.. Repeat...

Makes sense to me...

-Kyle

Okay, so the digital LED went well.... but....

I have struggled a bit after getting the digital LED thing going... I thought I was going to jump right into other stuff... As the day wound down, I ended up going with an analog LED VI.. Right around 1.8 volts the LED starts to come on, but is very dim.. After 2 volts, it doesn't really get any brighter, and the rail is like 16volts..

Anyways, here is the VI for it.

Tada........

Well... Here it is.. Wish I had a video camera to show you, but this is the blinking LED. I put it so it is logic 1 for 500ms, and logic 0 for 500ms, so it blinks on and off once per second.. I thought about going through gyrations of speeding up the blinking light, and slowing it down, or even putting it on a random number generator, but I think I got the premise down, and time to move on to bigger and better things.

Let's see about doing a little digital input!

-Kyle

Another week goes by, and progress it is!!!!

This is what I go so far.. It makes the LED blink on and off like I want, but not at the rate at which I want... I did notice though that when you pull the digital output to ground on the multi-meter, that the voltage is not the logic 5v I expected, but right at the point where its leading edge is high enough to push it into the 1 slot,, 3.2 volts or whatever...

-Kyle